Description
EDF R&D is hiring an intern to develop hardware-based artificial intelligence using the Arbitration Core, a digital circuit that embeds small local models and networks them to compose higher-order systems. The internship covers VHDL hardware design, embedded-model development, test-bench creation, core networking, and porting to hardware targets. It is technically demanding and requires advanced VHDL and synchronous digital-design skills, with an engineering or Master 2 background in artificial intelligence, embedded systems, or digital electronics. The internship is paid 1,230–1,557 EUR gross per month and is scheduled to start in February or March 2027 at EDF R&D in Chatou, France.
