Description
The role develops functional and performance models for machine-learning hardware intellectual property, integrates them with Cloud TPU SoC models, and supports pre-silicon verification, post-silicon validation, and compiler and software teams. It requires a bachelor's degree or equivalent practical experience, two years of hardware IP simulation-model experience or a PhD, and experience with modern C++ software systems. Preferred qualifications include advanced degrees in computer architecture, computer architecture problem-solving, hardware and software co-design, RTL Verilog, and processor or accelerator design.
