Description
Fortaegis is hiring a Hardware Security Engineer to design and secure next-generation cryptographic engines for semiconductor SoCs. The role involves end-to-end RTL implementation of hardware crypto modules, integration of masking, hiding, and fault-detection countermeasures, evaluation with side-channel analysis tools, and creation of targeted verification test benches. Candidates need RTL experience for ASIC or FPGA, knowledge of AES, ECC, and SHA, and hands-on experience with side-channel countermeasures.
