Description
Efficient is hiring a Silicon Engineering Intern to join its hardware team and work on production silicon for an energy-efficient processor architecture. The intern will define micro-architecture, implement RTL in SystemVerilog, develop verification plans and testbenches, run synthesis and timing analysis, improve design and verification flows, and collaborate with architecture, design, and verification engineers before tapeout. The internship is 12 weeks onsite in Summer 2027, followed by full-time onsite or part-time onsite/part-time remote work in Fall 2027, with work locations in Austin, Texas; San Jose, California; or Pittsburgh, Pennsylvania.
