Qualcomm International Inc., Mexico Branch Office

Hardware System Design Engineer, Senior or Staff at Qualcomm International Inc., Mexico Branch Office

Department: ASICS Engineering

Compensation

$121,800 – $182,600/yr

Setup: On-site
Location: San Diego, California
Type: Full-time
Level: staff+
Posted: Sep 17, 2026

Description

Qualcomm is hiring a full-time Hardware System Design Engineer, Senior Staff to design high-performance FPGA-based emulation platforms in San Diego. The role owns the board design lifecycle, including schematic capture, 26+ layer PCB stack-up and layout, BOM management, power and signal integrity simulation, and verification testing, while collaborating with customers, software, firmware, mechanical, manufacturing, and other engineering teams. Responsibilities include FPGA board design, DDR memory subsystems, system architecture, lab bring-up and debug, customer technical support, and production support. The position requires 5+ years of relevant experience, a bachelor’s or master’s degree in a related engineering field, and is 100% on-site with no remote or hybrid work option.

Required Skills

FPGA design
PCB layout
Signal integrity
DDR memory
SERDES
HDL coding
Linux/Unix
Vivado
Quartus
HyperLynx
Ansys HFSS

Additional Information

Minimum Education: Bachelor's degree in Science, Engineering, or a related field, with 2+ years of ASIC design, verification, validation, integration, or related work experience.
Required Previous Experiences: 5+ years of experience in system architecture, hardware board design, and signal integrity simulations.
Experience with FPGA board design using Xilinx and/or Altera.
Experience with 10 Gbps or higher SERDES board designs.
Experience performing power and signal integrity simulations for 10 Gbps+ signals.
Experience with DDR3/DDR4/DDR5 discrete component board designs.
Board- and system-level bring-up and debug experience.
Experience mentoring junior engineers and providing technical guidance; Staff-level candidates should also mentor senior engineers and lead design reviews.
Preferred Qualifications: Power supply design experience.
Signal integrity and PDN simulation experience.
DFM and DFT review experience with PCB fabricators and contract manufacturers.
Python or Perl scripting for design automation or test workflows.
IPC Certified Interconnect Designer or equivalent certification.
Experience supporting products from concept through production release and factory NPI.
Experience defining board or system design methodology, reusable IP, or standards across multiple programs, or prior technical lead or hardware architect experience.
Translation Company Name: Qualcomm Technologies, Inc.