Description
Apple is hiring a hardware verification engineer in Cupertino, California, and other unanticipated locations throughout the United States. The role reviews SoC, IP, and subsystem specifications; develops and maintains test and coverage plans; writes and executes System Verilog-based simulation tests; collaborates with design and micro-architecture teams; debugs simulation failures; tracks verification progress; and documents methodologies. The position requires a bachelor’s degree in electrical or electronics engineering or a related field, three years of relevant experience, and expertise in System Verilog, UVM, C/C++, Python, Perl, EDA tools, and high-speed interface protocols. The schedule is 40 hours per week, with a base pay range of $155,896 to $225,300 per year.
