Description
The High Level Synthesis Compiler Engineer will develop and optimize compiler tools that transform RTL and constraints into realizable FPGA designs, including lowering, analysis, transformation, correctness- and quality-of-result-driven optimization, and scalability improvements. The role also involves customer-facing technical support, documentation, mentorship of engineers, and staying current with EDA and compiler technologies. It is a regular full-time position in Toronto, Ontario, with an estimated salary range of $124,100 to $179,700 CAD and requires a relevant bachelor's or master's degree plus 8+ years of professional compiler, LLVM/MLIR, or EDA/FPGA implementation experience.
