HPC SoC Timing Design Engineer/Leader at Draup

Department: Engineering

Language

Setup: On-site
Location: Japan
Type: Full-time
Level: lead/mgmt
Posted: Jul 29, 2026

Description

The company is hiring an HPC SoC Timing Design Engineer/Leader to support the design of large-scale automotive SoCs. The role covers static timing analysis, timing constraint analysis, and logic synthesis using commercial and in-house tools, with collaboration with overseas design centers. Candidates need at least five years of digital LSI design experience, including three years in timing design, and business-level English or Japanese. The position is based in Kodaira, Japan.

Required Skills

Static timing analysis
Timing constraint analysis
Logic synthesis
STA tools
SDC
Verilog-HDL
Leadership

Additional Information

Required Previous Experiences: Over 5 years of digital LSI design experience
Over 3 years of timing design experience, including static timing analysis and timing constraint analysis
Preferred Qualifications: Understanding of hardware description languages such as Verilog-HDL
Professional English experience
Management experience
Interest in future management
Translation Company Name: Hop

About Draup

Draup

enterprise agentic AIThe Woodlands, TX, US

Draup is an enterprise agentic AI company. Draup builds AI workforce transformation software for HR leaders and AI sales agents for enterprise GTM teams, both running on one proprietary data layer spanning workforce intelligence, work architecture, business intelligence, and tech stack intelligence.

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