Description
The Backend Digital Design Engineer will apply Broadcom’s design methodology and milestone flow to achieve right-first-time silicon, focusing on SoC physical design from 5nm and lower technologies. Responsibilities include floor-planning, partitioning, placement, clock tree synthesis, routing, physical verification, timing and functional ECO, STA closure, and automation flow development. The role requires deep backend digital design knowledge, proficiency with Cadence, Synopsys, Mentor, and other EDA tools, strong Tcl and Perl skills, and the ability to improve turnaround time and quality in a collaborative environment.
