Description
Lead the development of IEEE 1687-based iJTAG test solutions, focusing on scan network modeling, instrument access, and test pattern execution. This role involves designing and implementing DFT methodologies such as scan, BIST, and hierarchical access mechanisms. The position also includes integrating AI/ML features for pattern compaction, failure prediction, and scan-failure root-cause analysis. Responsibilities extend to developing scalable automation frameworks in Python/C++, streamlining DFT workflows with Tcl/Perl/Shell, and building APIs/pipelines for large-scale data ingestion and processing.
