Description
Apple is hiring an ASIC Design Engineer to integrate IP and RTL into SoCs, develop top-level RTL and interconnects, perform linting, synthesis, CDC/RDC, and timing closure, maintain automated build and regression infrastructure, support design verification, and contribute to design documentation and reviews. The role requires a bachelor's degree and at least 10 years of experience, with digital logic, RTL, SoC flows, bus protocols, ASIC tooling, scripting, debugging, and collaboration skills preferred.
