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Intern: Application Engineering - Digital Verification & Simulation/VIP at Cadence

Language
Location
Belo Horizonte, Minas Gerais
Type
Part-time, Internship
Level
intern
Posted

Description

Cadence Design Systems is hiring an Application Engineering Intern focused on Digital Verification and Simulation, specifically VIP, in Belo Horizonte, Brazil. The intern will receive mentorship in RTL-level verification, provide technical support to customers and field personnel, conduct root-cause analysis, develop and run test cases, collaborate with R&D, author application notes, and use TCL and Python for flow development and automation. The internship requires a bachelor’s degree in a relevant engineering or computer science field, graduation in mid-2027, strong problem-solving and communication skills, and an interest in learning the listed technical topics.

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