Intern - DRAM Test Structure Design and Layout Engineering at Micron

Micron Technology is hiring an Engineering Intern for its DRAM Build Enablement and Test Structure Engineering team. The role involves developing and verifying semiconductor test structures, supporting DRC and LVS physical verification, simulating device and process behavior, analyzing electrical characterization data, writing automation scripts, and exploring AI-assisted engineering workflows. Candidates must be pursuing a bachelor's, master's, or PhD degree in a relevant engineering or science field and cannot graduate before September 2027; coursework or project experience in VLSI, semiconductor processing, device physics, EDA tools, and layout verification is preferred.