Description
The Semiconductor IO Layout Engineer will develop parallel standard IO layouts such as I2C, SPI, and GPIO for differentiated sub-micron technologies, including designs involving SLIMBUS, LVDS, and USB2.0. The role covers IO and analog block layout, floor planning, EDA tools, design rules, electrical schematics, and performance and manufacturability considerations. A bachelor's or master's degree in electronics engineering or a similar field and 1–3 years of experience are required.
