Description
Astera Labs is seeking a Digital Design Engineer to develop high-performance processor, peripheral, and full-chip connectivity solutions. The role covers RTL development, synthesis, micro-architecture, IP integration, timing closure, verification, and pre- and post-silicon debug, with a focus on advanced-node designs at 16nm or smaller. The position requires extensive digital design experience, processor and PCIe expertise, and familiarity with Synopsys/Cadence tools and UVM-based verification.
