Description
Synopsys is hiring an IP Implementation & Physical Design Engineer specializing in Serdes subsystems. The role drives RTL-to-GDS implementation for high-speed interface IPs such as Serdes, DDR, HDMI, MIPI, and USB across 7nm, 5nm, and 3nm nodes, using Synopsys EDA tools for synthesis, floorplanning, power planning, clock tree synthesis, placement, routing, timing closure, and physical signoff. The engineer will also develop automation scripts, collaborate with cross-functional teams, support customers during IP integration, and contribute to silicon-proven interface IP for AI, autonomous vehicles, high-performance computing, cloud, 5G, and IoT applications.
