IP Logic Design Engineer at Solidigm

Solidigm is hiring a 3D NAND IP Logic Design Engineer to design, verify, and optimize logic and circuit blocks for 3D NAND flash memory. The role covers RTL design in SystemVerilog, synthesis, static timing analysis, ECOs, microcode-based algorithms, pre-silicon verification, simulation, power and performance modeling, design for testability, and post-silicon debug and failure analysis. Candidates need an MS in electrical or computer engineering with 7+ years of experience, or a BS with 9+ years of experience, along with strong ASIC design, verification, and scripting expertise.