Description
The Design Verification Engineer will join a team developing and verifying high-speed SerDes IP, including digital and analog design, DSP pipelines, firmware-hardware co-verification, and advanced verification environments. The role involves constrained-random and coverage-driven verification, validation of DSP datapaths, joint firmware and hardware verification, and use of AI-assisted engineering tools. It is a regular full-time position in Israel, with primary location Jerusalem and additional locations in Haifa and Tel Aviv, and seeks recent graduates or candidates with 0–3 years of industry or academic experience.
