Description
Synopsys is hiring a Layout Design Engineer in Da Nang, Vietnam, to work on custom analog mixed-signal IP such as high-speed IOs, PLLs, DLLs, bandgap references, and high-speed macros. The role covers floor planning, power design, signal routing, EMIR awareness, parasitic optimization, DRC/LVS/ERC/ANT/ESD/DFM verification, design-quality checks, and reporting to mentors and design leads. The position is intended for fresh graduates or engineers with 1–2 years of IC design experience, requires a BS in a relevant engineering field, and offers training, benefits, and career development opportunities.
