Description
Synopsys is hiring a Sr Staff Engineer for Layout Design in Noida, India, to lead physical layout development for advanced memory IP including SRAM, ROM, eDRAM, and emerging memory types across 3nm to mature technology nodes. The role covers layout architecture, DRC/LVS/ERC/EMIR resolution, RC extraction, signal integrity, layout automation, and mentoring senior engineers. Candidates need a bachelor's or master's degree in a relevant technical discipline and typically 10+ years of hands-on custom physical layout experience, with demonstrated success across multiple advanced nodes and tapeouts.
