Description
Synopsys is hiring a Senior Staff Analog Layout Engineer in Bengaluru to design full-custom analog layouts for UCIe PHY blocks and advanced 2.5D/3D chiplet integration. The role covers floor planning, bump planning, high-speed differential routing, signal integrity, physical verification, ASIC physical design integration, automation, technical reviews, and tape-out execution. Candidates need a diploma or bachelor's degree in electrical or electronics engineering and 8 to 15 years of analog or mixed-signal custom IC layout experience, including UCIe PHY, SerDes, or die-to-die interface work.
