Description
Synopsys is hiring a Staff Engineer for Layout Design in Da Nang, Vietnam, to lead physical layout of advanced memory IP including SRAM, ROM, and eDRAM. The role covers cell, array, and peripheral circuit design; DRC and LVS resolution; area, performance, power, yield, and manufacturability optimization; RC extraction and parasitic analysis; reliability debugging; and mentoring junior engineers. Candidates need a bachelor's or master's degree in a relevant technical field and at least five years of hands-on custom layout experience focused on memory structures, along with expertise in layout tools and foundry design-rule flows.
