Synopsys is hiring a Staff Memory Layout Engineer in Da Nang to lead physical layout design for advanced SRAM, ROM, and eDRAM IP at the cell, array, and peripheral circuit levels. The role focuses on meeting foundry design rules, resolving DRC and LVS issues, optimizing area, performance, power, yield, and manufacturability, performing RC extraction and parasitic analysis, debugging reliability issues, collaborating with design and verification teams, and mentoring junior engineers.
Every query opens live roles, salary samples, and market demand — tap a search to run it instantly.
Unlock powerful job search, personalized recommendations, and deep career insights from comprehensive, market-leading data and live market signals.
For job seekers
Upload your résumé, start a Job Search Thread, and let Metaintro rank real openings against your experience — then guide you from search to offer.
Match
Compare live roles against your current evidence.
Position
Turn proof projects into role-specific applications.
Improve
Use market feedback to keep the skill plan current.
AI Infrastructure
Synopsys delivers comprehensive silicon-to-systems solutions that help innovators accelerate development, reduce risk, and drive breakthroughs.