Description
Cadence Design Systems is hiring a Lead Application Engineer: IC Packaging Design & Analysis to support customers in deploying and adopting Cadence IC packaging design and analysis solutions. The role focuses on Allegro X Advanced Package Designer and Sigrity platform tools, chip–package–PCB co-design, system-level analysis, debugging, optimization, customer training, technical documentation, and collaboration with R&D and field teams. The position is based in Munich, Germany, with the option to work at another Cadence site in Europe.
