Description
SiFive is hiring a Hardware Design Technical Lead to architect, design, implement, and enhance debug, trace, and profiling hardware for RISC-V processor subsystems. The role involves RTL generator development, Chisel/FIRRTL integration, verification, documentation, and collaboration with architecture, performance, software, hardware, customer, partner, and tools-vendor teams. Candidates need substantial experience in debug/trace/profiling hardware, RTL design, CPU and SoC concepts, and a relevant MS or PhD.
