Description
Lattice is seeking a highly experienced engineer to join their team in Penang, Malaysia. This role involves leading research, design, and development of safety-qualified Foundation IP and safety-relevant aspects of FPGA EDA design flows. The candidate will ensure alignment with product, quality, and Functional Safety requirements, working closely with cross-functional teams to manage the entire Lattice Foundation IP release cycle, from requirement analysis to final sign-off. The ideal candidate will possess strong communication skills, extensive experience in FPGA architecture and software tools, and hands-on experience in SoC and FPGA RTL design, testbench development, logic verification, timing closure, and debugging according to functional safety guidelines.
