Description
Architect is hiring a Design Verification Engineer to own the verification strategy for AI-generated SoC designs taping out on leading foundries. The role combines hardware verification with AI-driven design automation, covering test plans, validation strategies, microarchitectural checkers, coverage models, IP and SoC validation platforms, simulation and emulation flows, and cross-functional integration. Candidates should have a degree in electrical or computer engineering, at least five years of advanced-node tapeout experience, strong SystemVerilog, UVM, and C/C++ skills, and hands-on experience with semiconductor verification methodologies and at least one listed subsystem or protocol.
