Memory Compiler Architect at Bloomberg

Compensation

$226,000 – $338,000/yr

Location: Sunnyvale, California
Type: Full-time
Level: not_specified
Posted: Mar 2, 2026

Description

Synopsys is seeking a highly experienced Memory Compiler Architect with over 15 years of expertise in memory architecture and analog circuit design. This role involves designing, developing, and evaluating physical IP such as Memory Compilers (SRAM/RF/ROM/TCAM), optimizing memory architectures for performance and power, and collaborating with cross-functional teams. The architect will contribute to the technical direction of the engineering group, mentor team members, and advance Synopsys' product portfolio.

Required Skills

memory architecture
analog circuit design
circuit design
memory compiler flow
Python
Hspice/XA
industry standard verification tools
problem-solving
technical skills

Additional Information

Required Previous Experiences: over 15 years of experience in memory architecture and analog circuit design including schematic capture and functional verification.
Significant experience in memory compiler flow.
Preferred Qualifications: Proficiency in Python and Hspice/XA.
Familiarity with industry standard verification tools for design and signoff flows.
Strong problem-solving and technical skills.
Ability to work collaboratively and communicate effectively within and across teams.