Description
Arm is hiring a Memory Layout Designer for its Physical IP – Memory group to create full-custom layouts of high-performance memory arrays and blocks, interpret physical design rules, verify layouts with DRC/LVS/DFM tools, and perform electro-migration and IR checks. The role requires at least two years of relevant layout design experience, a bachelor’s or master’s degree or equivalent education, and experience with Cadence Virtuoso layout systems. The position offers hybrid working and professional development opportunities.
