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Memory Silicon Validation Engineer at NVIDIA

Department: Engineer, ASIC

Language
Setup
On-site
Location
Taipei
Type
Full-time
Level
senior
Posted

Description

NVIDIA is hiring a Senior Memory Qualification Engineer in its Silicon Co-Design Group to bring up, characterize, and qualify high-speed GDDR, LPDDR, and HBM interfaces on GPU, CPU, and SoC silicon. The role owns functional validation, IO tuning, timing margins, multi-vendor DRAM qualification, root-cause closure of complex memory failures, and AI-enabled workflows for shmoo and margin analysis. Candidates need a B.Tech or M.Tech in a relevant engineering discipline, at least four years of semiconductor experience including three years on shipped-memory qualification, and demonstrated experience with memory interface debugging, lab instrumentation, and AI-driven characterization workflows.

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