Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development at Qualcomm Technologies, Inc.

Department: Modem Technologies

Compensation · Listed in posting

$162,500 – $243,700/yr

Setup: On-site
Location: San Diego, California
Type: Full-time
Level: senior
Posted: Sep 30, 2026

Description

Qualcomm is hiring a Modem Hardware Design Engineer to define modem specifications and architecture, develop RTL, and optimize wireless modem ASICs for area, power, and performance. The role collaborates with hardware verification, modeling, physical implementation, system, RF, firmware, and software teams to deliver first-time-right silicon, while leveraging GenAI, ML-assisted flows, and agentic-AI automation. Candidates need a bachelor's, master's, or PhD in a relevant engineering field plus the stated years of experience, with RTL, Verilog, SystemVerilog, C/C++, SystemC, synthesis, low-power design, and wireless modem technology experience preferred.

Required Skills

RTL coding
Verilog
SystemVerilog
C/C++
SystemC
Synthesis
Low-power design
Generative AI
Python/Perl

Additional Information

Minimum Education: Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field, plus 4+ years of relevant work experience; alternatively, a master's degree with 3+ years or a PhD with 2+ years.
Required Previous Experiences: 4+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience for bachelor's-degree candidates
3+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience for master's-degree candidates
2+ years of Software Engineering, Hardware Engineering, Electrical Engineering, Systems Engineering, or related work experience for PhD candidates
Preferred Qualifications: BS or MS degree with 5+ years of relevant industry experience
Strong RTL and logic design expertise for wireless modem ASICs or DSP datapath components
Understanding of Verilog, SystemVerilog, C/C++, and SystemC
Experience with synthesis, LINT, clock domain crossing, low-power design, and verification
Background in wireless or wireline modem technology, DSP, or communication systems
Knowledge of 4G/5G 3GPP physical layer standards
Experience with ultra-deep sub-micron CMOS technology nodes, such as 4nm and below
Experience with Generative AI, machine learning, or agentic-AI-based automation
Proficiency with Unix/Linux shell scripting, Python/Perl, Makefiles, and XML
Excellent communication, collaboration, and critical-thinking skills