Description
Google is hiring a Networking ASIC Design Engineer to define block-level designs, develop RTL, debug and verify hardware, and participate in synthesis, timing, power, FPGA, and silicon bring-up. The role requires a bachelor's degree in a relevant engineering or computer science field and eight years of experience architecting networking ASICs from specification through production, along with experience in RTL, micro-architecture, verification, synthesis, and timing closure. Preferred qualifications include RDMA or packet-processing experience, networking hardware design, hardware/software interface optimization, procedural programming, and knowledge of networking protocols and NoC principles. The position is based in Haifa or Tel Aviv, Israel, and typically requires in-person interviews.
