Description
Qualcomm is hiring a Hardware Micro-Architect / RTL Designer to develop and validate RTL for system-on-chip interconnects, interconnect caches, memory controllers, and power and system-level design for Snapdragon platforms. The role includes hardware optimization, algorithm feasibility evaluation, micro-architecture and specification development, RTL implementation, verification and debugging, silicon cost and clock-speed optimization, and troubleshooting silicon issues. Candidates need a bachelor's, master's, or PhD in a relevant field, 2–4 years of ASIC design or related experience depending on the degree, and experience with Verilog or SystemVerilog, synthesis, low-power design, and verification.
