Description
The Packaging Engineering Intern will interface across work areas and organizations to support the design, development, and analysis of semiconductor packaging technologies for TI's analog and embedded processing products. The role may involve cross-functional work on Wirebond, Flip Chip, Modules, SIPs, and other advanced packages, as well as material, mechanical, thermal, and electrical characterization. Candidates must be currently pursuing a master's degree in a relevant engineering or science field and maintain a cumulative GPA of 3.0 or higher.
