Description
This is a PhD research position focused on improving CMOS circuit design rules to protect against plasma-induced damage (PID). The work includes designing test structures, performing electrical characterization of MOS transistors, analyzing data with artificial intelligence, and applying the results to technologies such as P18, 28FDSOI, and 3D40. Candidates should have a Bac +5 degree, strong knowledge of semiconductor physics and programming, laboratory experimentation skills, interest in AI-based data analysis, and a collaborative, methodical approach.
