Description
Etched is hiring a Physical Design Engineer to own block-level implementation and verification, drive timing closure and PPA optimization, supervise third-party design work, and improve ASIC design flows. The role requires 5–10+ years of physical design experience, advanced-node timing closure, EDA tool expertise, and sign-off methodology. It is based in Etched’s Austin office with regular collaboration in San Jose, including approximately two weeks per month in San Jose during the first quarter and roughly one week per month thereafter.
