Description
Quest Global is hiring a Full Chip Lead to own and drive the end-to-end physical design flow for SoCs, including chip-level partitioning, hierarchical block integration, power-grid architecture, and full-chip place-and-route through timing closure and sign-off. The role requires 10–15+ years of ASIC/SoC physical-design experience, expertise in advanced-node tapeouts, strong STA and power-integrity knowledge, industry-tool proficiency, and leadership across RTL, STA, DFT, packaging, and verification teams.
