Physical Design Engineer (Silicon Engineering) at SpaceX

Department: Silicon EngineeringEducation: education_required

Compensation

$135,000 – $210,000/yr

Location: Palo Alto, California
Type: Full-time
Level: entry
Posted: Sep 11, 2026

Description

SpaceX is hiring a Physical Design Engineer (Silicon Engineering) to develop and improve next-generation ASICs for space and ground infrastructure. The role covers RTL-to-GDSII physical design, partition synthesis, floorplanning, place-and-route, timing, noise, physical verification, electromigration, voltage drop, signoff closure, and automation. Candidates need a bachelor’s degree in electrical engineering, computer engineering, or computer science and at least one year of professional experience in RTL-to-GDSII physical design or physical design flow development. The position offers base salary of $135,000–$175,000 for Level 1 and $155,000–$210,000 for Level 2, plus medical, vision, dental, retirement, disability, life, paid leave, and other benefits.

Required Skills

RTL-to-GDSII
Partition synthesis
Floorplanning
Place and route
Static timing analysis
Physical verification
EDA tools
Python
FinFET

Additional Information

Minimum Education: Bachelor’s degree in electrical engineering, computer engineering, or computer science
Required Previous Experiences: At least 1 year of professional experience in RTL-to-GDSII physical design or physical design flow development
Preferred Qualifications: Experience with industry-standard EDA tools and their algorithms
Knowledge of deep-submicron FinFET and CMOS solid-state physics
Understanding of CMOS digital design, standard cells, and standard-cell libraries
Understanding of CMOS power dissipation, leakage, and dynamic effects
Familiarity with CMOS analog circuit and physical design
Basic knowledge of DFT, scan, MBIST, and LBIST
Scripting skills in csh/bash, Perl, Python, TCL, or Makefile
Translation Company Name: SpaceX