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Physical Design Intern at Etched

Department: ASIC

Setup
On-site
Location
San Jose, California
Type
Internship
Level
intern
Posted

Description

Etched is hiring a Physical Design intern to realize front-end designs in silicon, develop and run physical design flows, synthesize blocks, automate final design checks, and advise RTL design decisions. The role is available for Fall 2026, Spring 2027, and Summer 2027, is a 12-week paid internship based in San Jose, California, and includes housing support and daily meals. Candidates should be pursuing a degree in electrical engineering, computer engineering, or a related field and have familiarity with high-speed digital logic, ASIC or SoC design, SystemVerilog, UVM, Python, verification, and physical design flows.

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