Description
Astera Labs is looking for a Physical Design Student to join their R&D center in Israel. This role involves working with senior engineers to implement and guide the physical design of complex semiconductor chips used in AI infrastructure. The student will gain hands-on experience in backend execution methods like synthesis, floorplanning, Place & Route, and Clock-Tree Synthesis, as well as learning to run engineering checks for design integrity using tools such as Static Timing Analysis and Physical Verification. They will also collaborate cross-functionally and leverage scripting tools to optimize the engineering environment.
