Description
Apple is hiring a Physical Verification Engineer to join its Silicon Technologies group and help design and manufacture a high-performance, power-efficient system-on-chip. The role performs chip- and block-level physical verification, including LVS, DRC, design-for-manufacturing, design-for-yield, and lithography; collaborates with CAD, technology, implementation, package, and floorplan teams; supports flow bring-up and tapeout signoff; and leads schedules and cross-functional engineering efforts. The position requires strong physical verification methodology, ASIC physical design knowledge, scripting, industry-standard tool experience, and real chip tapeout experience with successful signoff.
