Description
The Post-Silicon Validation Architect will define validation strategies, test plans, and automation frameworks for next-generation display chips. The role leads silicon bring-up and debugging, develops test plans for display protocols, frame buffers, pixel pipelines, and image processing, and scales automated test frameworks using high-speed validation equipment. It requires deep knowledge of MIPI DSI-2, pixel formats, display technologies, FPGA prototyping, bitstream and PVT verification, and Python-based automation, along with 8+ years of post-silicon validation experience in display, multimedia, or high-speed SoC environments.
