Qualcomm International Inc., Mexico Branch Office

Post Silicon Validation -Sr/Lead/Staff Engineer at Qualcomm International Inc., Mexico Branch Office

Department: ASICS Engineering

Setup: On-site
Location: Hyderabad, Telangana
Level: senior
Posted: Sep 22, 2026

Description

Qualcomm is seeking an ASIC Engineer to define, model, design, optimize, verify, validate, implement, and document multimedia and imaging IP for high-performance, low-power products. The role works with system architects, designers, verification, firmware, and software engineers to develop multimedia and imaging cores, bring-up drivers, functional and performance tests, debug and manufacturing tests, and low-level C/C++ code. The engineer will perform device-level and system-level verification, validation, and debugging in emulation and post-silicon environments, with requirements spanning ASIC design, embedded software, ARM-based SoC validation, high-speed interfaces, signal integrity, JTAG debugging, and related hardware and software tools.

Required Skills

ASIC design
C/C++
Python
ARM Core
JTAG debugging
Signal Integrity
Lauterbach Trace32
Verilog/System Verilog
FPGA design
DFT/DFD

Additional Information

Minimum Education: Bachelor's degree in Electronics and Communications Engineering, Computer Science, Electrical Engineering, or a related field
Required Previous Experiences: 6+ years of hardware, systems, software, or related engineering experience
6+ years of experience with C, C++, Python, Java, shell scripting, version-control tools, and RTOS
6+ years of experience using in-circuit emulation and debugging tools
Experience with multimedia, peripheral, ARM core, or IP validation
6+ years of embedded software development and related experience
ARM-based SoC emulation, debug, and validation experience
Experience validating and debugging MIPI-based high-speed interfaces, signal integrity, and camera/video imaging
Experience with digital integrated circuit or core design, digital IC architecture, and ASIC lifecycle development
Experience with machine learning, deep learning, and neural networks
Experience using standard laboratory test equipment
Understanding of JTAG debugging and Lauterbach Trace32 scripting
Understanding of low-power design, performance, and thermal processes
Knowledge of Verilog/System Verilog and FPGA design
Familiarity with DFT/DFD and ATE/ATPG
Familiarity with RMA process
Preferred Qualifications: Familiarity with ARM Coresight IP, compilers, linkers, and scatter-files
Python-based device test scripting and automation development
Experience with standard laboratory test equipment