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Power Integrity Engineer at Apple

Department: Hardware

Location
San Francisco, California · San Diego, California
Level
not_specified
Posted

Description

The SoC Power Integrity Engineer will develop, implement, and verify power integrity solutions for compute and connectivity SoCs used in Apple devices. The role covers PDN architecture, power delivery modeling and simulation, off-die droop budgets, on-die inrush, noise coupling, voltage guard bands, active droop mitigation, and end-to-end model-to-hardware correlation across die, package, module, PCB, and system levels. The position requires a bachelor's degree and offers an M.S. or Ph.D. in relevant fields, Python and AI/ML automation, PDN modeling, power-supply design, EM simulation, and laboratory equipment experience as preferred qualifications.

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