Pre-si Power and Performance System Validation Engineer at 100 Intel Corporation

Compensation · Listed in posting

$122,440 – $232,190/yr

Location: Austin, Texas · Hillsboro, Oregon · +2
Type: Full-time
Level: senior
Posted: Sep 23, 2026

Description

Intel is hiring an experienced SoC Power Thermal Performance Validation and Optimization Engineer for its Data Center Group. The role develops and executes SoC-level power, thermal, and performance validation plans; collaborates with architecture, design, firmware, and software teams; optimizes hardware and software solutions; debugs SoC failures; configures thermal data loggers; and maintains validation infrastructure. The position requires a bachelor's degree in electrical or computer engineering, at least three years of SoC power and performance validation experience, and technical expertise in debugging, silicon verification, Python, and related SoC technologies. It is an on-site role in the United States, with primary locations in Austin, Texas, and additional locations in Folsom, Santa Clara, and Hillsboro; the annual salary range is $122,440 to $232,190 USD.

Required Skills

SoC validation
SoC debugging
Python
Silicon verification
In-circuit emulation
FPGA prototyping
Power management
JTAG debugging

Additional Information

Minimum Education: Bachelor's degree in electrical engineering, computer engineering, or a related field
Required Previous Experiences: 3+ years of SoC power and performance validation experience
3+ years of Pre-Si simulation and emulation experience
3+ years developing or optimizing power and performance KPIs
2+ years of experience in each listed technical skill area
Preferred Qualifications: Master's degree
Knowledge of DSP, Ethernet, and 3G/4G/5G
2+ years of SoC FPGA or emulation experience
2+ years of SoC-level JTAG debugging
1+ year of Pre-Si functional design, validation, or hardware/firmware/software integration
1+ year of experience with major Pre-Si platforms
System-level power management of real-time processors and systems
Knowledge of MIPI MPHY, JTAG, DDR, PCIe, USB, Ethernet, and SPMI protocols
Familiarity with data loggers, behavioral checkers, and state space coverage
System board design and debugging with oscilloscopes and logic analyzers
Knowledge of AI accelerator systems
Performance modeling, benchmarking, and validation infrastructure