Description
The Analog Designer will join NXP’s Ehernet PHY and switch product development team, focusing on high-speed Ethernet and SerDes analog design. The role requires 12+ years of analog experience, transistor-level design knowledge, CMOS process expertise, EMC/ESD and analog EDA tool experience, and ownership of analog design execution, performance, reliability verification, and yield improvement. The designer will also collaborate with system and digital teams on analog front-end interfaces and calibrations, and mentor junior designers.
