Principal DFT Engineer (Silicon Engineering) at SpaceX

Department: Silicon EngineeringEducation: education_required

Compensation

$220,000 – $355,000/yr

Location: Palo Alto, California
Type: Full-time
Level: lead/mgmt
Posted: Jul 30, 2026

Description

SpaceX is hiring a Principal DFT Engineer (Silicon Engineering) to develop and validate next-generation ASICs for Starlink’s space and ground infrastructure. The role leads DFT architecture implementation, scan insertion, compression and decompression logic, memory and logic BIST, ATPG, test-flow integration, design-readiness checks, gate-level simulation, and test-script automation. Candidates need a bachelor’s degree in electrical engineering, computer engineering, or computer science, plus 10+ years of ASIC and DFT experience. The position offers a Level 3 base salary of $220,000 to $355,000, medical, vision, and dental coverage, retirement and disability benefits, paid leave, and other perks, with extended hours and weekends as needed.

Required Skills

Scan insertion
ATPG
Memory BIST
Logic BIST
Siemens Tessent
Python
Verilog/SystemVerilog
ATE testers

Additional Information

Minimum Education: Bachelor’s degree in electrical engineering, computer engineering, or computer science
Required Previous Experiences: 10+ years of ASIC experience
10+ years of scan insertion and DFT setup, integration, and validation experience
Preferred Qualifications: Leadership experience driving SOC DFT execution from concept through tapeout and product deployment
RTL experience for DFT connectivity issues
Clock-domain crossing and power optimization
UPF, formal verification, and DRC rule checking
Advanced silicon process and technology nodes
Verilog/SystemVerilog design-block implementation
ATE tester and test-team experience
Translation Company Name: SpaceX