Description
NXP is hiring a Principal Digital Verification Engineer in Chandler, Arizona, to lead digital verification of next-generation Power Management ICs for automotive and industrial applications. The role owns verification planning, environments, test scenarios, coverage, signoff, automation, and delivery of verification collateral, while also mentoring junior engineers and collaborating across global teams. Candidates need a BSEE with 8+ years, MSEE with 5+ years, or PhD with 3+ years of semiconductor industry experience, along with expertise in SystemVerilog, UVM, constrained-random verification, coverage, formal verification, and PMIC-related protocols and concepts.
