Description
Synopsys is hiring a Principal Digital Verification Engineer to verify memory interface IP for HBM, DDR, LPDDR, and AMBA protocols. The role involves designing SystemVerilog and UVM verification environments, developing test plans and reusable verification IP, collaborating with design and architecture teams, driving functional coverage, debugging failures, and mentoring junior engineers. The position also contributes to verification standards, reduces post-silicon bugs, and supports memory subsystems in AI accelerators, mobile SoCs, and high-performance computing platforms.
