Principal DSP SW Engineer at E-Space

Department: E-Space US

Compensation

$140,000 – $200,000/yr

Setup: On-site
Location: California
Type: Full-time
Level: senior
Posted: Sep 24, 2026

Description

E-Space is hiring a full-time DSP Software and Firmware Engineer to lead the architecture, implementation, verification, and bring-up of 5G NR modem physical-layer software and firmware for satellite non-terrestrial networks. The role covers PHY and link-level modeling, fixed-point and reference-model practices, C/C++ and Python/MATLAB implementation, SystemC TLM and high-level synthesis, ASIC and accelerator co-design, power-state coordination, and cross-team technical leadership through pre-silicon validation and silicon bring-up. The position is based in Santa Clara and offers a target base salary of $140,000 to $200,000 annually.

Required Skills

Communication DSP
5G NR PHY
C/C++
Python/MATLAB
Fixed-point
SystemC TLM
High-level synthesis
Low-power operation
Pre-silicon verification
Silicon bring-up

Additional Information

Minimum Education: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with equivalent demonstrated expertise; experience requirements vary by degree level.
Required Previous Experiences: Experience resolving performance and implementation tradeoffs across interacting PHY subsystems.
Experience converting floating-point algorithms to fixed-point implementations and validating against reference models.
Experience architecting and delivering embedded modem software across programmable processors and hardware accelerators.
Experience guiding low-power ASIC and firmware co-design and power-budget evaluation.
Technical leadership across multiple PHY subsystems through pre-silicon validation and silicon bring-up.
Preferred Qualifications: Experience establishing SystemC TLM or synthesizable HLS flows.
Experience leading 5G NR NTN modem development or satellite-specific timing challenges.
Experience correlating simulation results with hardware measurements.
Experience with 5G NR MAC, PHY/MAC interfaces, scheduling, or HARQ.
Experience optimizing algorithms on vector DSPs.
Experience validating ASIC power-management features through firmware.
Translation Company Name: E-Space